The modification of synthesis method of compositional microprogram control units is directed to decrease of hardware amount in scheme of control unit in FPGA basis. Reduction of complexity of block of microinstruction addressing is reached due to of field with pseudoequivalent operational linear chain class code. Conditions of proposed method usage possibility are given. The example of method implementation is shown.

compositional microprogram control unit, operational linear chain, microinstruction addressing, class of pseudoeqivalense